1. Technical Field
Embodiments of the present disclosure generally relate to semiconductor devices, and more particularly, to semiconductor devices testing a data interface.
2. Related Art
A system-in-package (SiP) technique and a chip-on-chip (CoC) technique have been widely used as packaging techniques for putting a large capacity of memory chip and a controller chip in a single package. The system-in-package (SiP) technique may use a wire bonding process to electrically connect a plurality of chips to each other. The chip-on-chip (CoC) technique may be a packaging technique which is suitable for increase of a memory capacity in a single package and for improvement of a data transmission speed between the memory chip and the controller chip in a single package. This is because the memory chip and the controller chip in the package communicate with each other through micro-bump pads.
The micro-bump pads may exhibit an excellent resistance characteristic, an excellent inductance characteristic and an excellent parasitic capacitance characteristic to allow the packages to operate at a high frequency. Thus, a data transmission speed may be improved by increasing the number of the micro-bump pads employed in the package. In the chip-on-chip (CoC) package, each of the memory chips and the controller chips may be fabricated to include the micro-bump pads, and the micro-bump pads of the memory chip may be combined with the micro-bump pads of the controller chip to produce a single unified chip including the memory chips and the controller chips.
In semiconductor memory devices, test operations may be executed to verify the functions of buffers or drivers through which data are inputted or outputted. When semiconductor packages fabricated using the chip-on-chip (CoC) technique are tested, data may be inputted or outputted through the micro-bump pads of the semiconductor packages.